1. Field of the Invention
The present disclosure relates generally to semiconductor fabrication methods and semiconductor devices and, more particularly, to methods of fabricating wordlines in semiconductor memories and semiconductor devices.
2. Description of Related Art
Semiconductor structures, such as memories and the like, may be organized with multiple parallel conducting paths, known as wordlines, oriented in a direction orthogonal to that of underlying bit lines. The wordlines are formed of conducting material and are electrically isolated from one another.
Maintaining electrical separation of wordlines as semiconductor device dimensions evolve to ever-smaller sizes is an on-going challenge in development of manufacturing processes. The required electrical separation may be compromised by the presence of undesired conducting paths, known as stringers, formed from residual conducting material remaining after one or more etch steps that form the wordlines.
Methods for assuring wordline separation applicable to larger geometries generally may not be effective when manufacturing processes are scaled down, such as to small geometries. For example, one prior art method of eliminating stringers involves forming polysilicon gates with reentrant profiles. While this practice may be effective in preventing formation of stringers, the use of reentrant profiles may cause adverse effects on the distribution of an important parameter for characterizing memory cells, namely threshold voltage, Vt, when critical cell dimensions are reduced, for example, to about the 30-40 nanometer range.
Use of reentrant profiles in conjunction with smaller geometries may adversely affect a distribution of Vt, a critical voltage level above/below which a memory cell changes state. That is, a width of a Vt distribution may exceed a value deemed acceptable for proper memory cell operation. If the value of Vt for a memory cell is not predictable and/or if values of Vt are too widely distributed, then operation of the memory cell becomes unreliable with concomitant negative consequences for yield and manufacturing cost. The distribution of values for Vt should be relatively narrow in order for memory cells to function properly.
Attempts to solve the Vt distribution problem by replacing reentrant profiles with vertical or tapered profiles may result in random single-bit failures due to polysilicon stringers that are not removed.
Thus, a need exists in the prior art for memory devices having a relatively narrow threshold voltage (Vt) distribution and for a method of manufacturing such memory devices. A further need exists for a method of eliminating the effect of stringers in memory devices having small geometries.